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RW1065
64x32 Dot Matrix LCD Controller / Driver
FEATURES
Direct display of RAM data through the display data RAM. RAM capacity64 x 64 = 4096 bits Display duty selectable by software 1/64 duty64common x 128segment (RW1065 x 2) 64common x 192segment (RW1065 x 3) 1/32 duty32common x 128segment (RW1065 x 2) 32common x 192segment (RW1065 x 3) High-speed 8-bit MPU interface (The chip can be connected directly to the 6800 series MPUs) Abundant command functions Display data Read/Write, display ON/OFF, Normal/Reverse display mode, page address set, display start line set, column address set, status read, display all point ON/OFF, read/modify/write, segment driver direction selects, power saver. Low-power liquid crystal display power supply circuit equipped internally. Bias set 1/5 1/6 1/8 1/9 by pin. Booster circuit (with Boost ratios of 2X/3X/4X, where the step-up voltage reference power supply can be input externally). V0 voltage regulator resistors equipped externally, V1 to V4 voltage divider resistors equipped internally, voltage follower. CR oscillator circuit equipped internally (external clock can also be input) Low power consumption. Logic power supply VDD - VSS = 2.7V to 5.5 V Boost reference voltage: VDD2 - VSS = 2.7V to 5.5V Booster maximum voltage limited VOUT=17.0V Liquid crystal drive power supply: V0 - VSS = 4.0V to 15.0 V Wide range of operating temperatures: -40 to 85C CMOS process. Shipping forms include bare chip and COB. Software compatible to KS0108.
GENERAL DESCRIPTION
The RW1065 is a single-chip dot matrix LCD driver that can be connected directly to a microprocessor bus. 8-bit parallel display data sent from the microprocessor is stored in the internal display data RAM and the chip generates a LCD drive signal independent of the microprocessor. Because the chips in the RW1065 contain 64x64 bits of display data RAM and there is a 1-to-1 correspondence between the LCD panel pixels and the internal RAM bits, these chips enable displays with a high degree of freedom. The RW1065 chips contain 32 common output circuits and 64 segment output circuits, so that two RW1065 chips can drive a 64x128 dot display (capable of displaying 8 columnsx4 rows of a 16x16 dot kanji font). Moreover, the capacity of the display can be extended through the use of master/slave structures up to three RW1065 chips. The chips are able to minimize power consumption because no external operating clock is necessary for the display data RAM read/write operation. Furthermore, because each chip is equipped internally with a low-power LCD driver power supply, and a display clock CR oscillator circuit, the RW1065 can be used to create the lowest power display system with the fewest components for high-performance portable devices.
1
RockWorks Technology Corp.
RW1065
64x32 Dot Matrix LCD Controller / Driver
BLOCK DIAGRAM
63
31
V4
RS
BS0
CS2P
CS1BP
BS1
RockWorks Technology Corp.
/RST
SHL ADC 2
RW1065
64x32 Dot Matrix LCD Controller / Driver
PAD ARRANGEMENT
COM26 COM25 COM23 COM24 COM22 COM19 COM20 COM17 COM18 COM16 COM15 COM14 COM13 COM30
18
COM29
COM28
COM27
COM31
19
COM21
9
17
16 15
14 13 12 11 10
8
7
6
5
4
3
2
1
133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115
SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 COM0 V1 V4 V2 V3 VRAB V0 VOUT CAP3P CAP1N CAP1P CAP2P CAP2N VDD2 SHLP BS0P BS1P MSP FRR CLSP RSTP VDD RWP RSP EP CS2P CS1BP D7 D6 D5 D4 D3 D2 D1 D0 Vss
C0503
Y
114 113 112 111 110 109 108 107 106
X
Chip size: 4897 um x1902um Pad size: 87.5um x 87.5um Pad pitch : 128um ~ 92um Substrate connects to VSS
105 104 103 102 101 100
99 98 97 96 95 94 93 92 91 90 89 88 87 86
SEG11
SEG13
SEG12
SEG10
SEG4 SEG3
SEG2 SEG1
SEG9
SEG8
SEG7 SEG6
SEG5
SEG0
3
RockWorks Technology Corp.
ADCR
CLL
RW1065
64x32 Dot Matrix LCD Controller / Driver
CHIP LAYOUT
PIN 1
RockWorks Technology Corp.
Digital Analog RAM
4
RW1065
64x32 Dot Matrix LCD Controller / Driver
Pin Description
(1)Power Pins
Name
VDD VDD2 VSS CAP1P~3P CAP1N~2N V0~V4
I/O
-
Description
Connected to the +5V 0r +3V dc power. Common to the Vcc MPU power pin. This is the retevence power supply for the Step-up voltage circuit.
-
0V dc pin connected to the system ground. Capacitor connector pin for voltage booster. Multi-level power supplies for LCD driving. The voltage determined for each liquid crystal cell is divided by resistance or it is converted in impedance by the op amp, and supplied. These voltages must satisfy the following: V0 V1 V2 V3 V4 VSS
(2)System Bus Connection Pins
Name
D7 to D0 RS CLS ADCP
I/O
I/O
Description
The 8-bit bidirectional data buses to be connected to the 8- or 16- bit standard MCU Data busses. Usually connected to the low-order bit of the MPU address bus and used to identify the data or a command. RS=0: D0 to D7 are display control data. RS=1: D0 to D7 are display data. CLS=1 : internal oscillator enable CLS=0 : external clock operation mode The pin selects the relationship between display data RAM column addresses and segment drivers. ADCP=1: SEG0column address 3FH,.....inverted ADCP=0: SEG0column address 00H,.....normal The pin selects the com output scan direction. SHL=1: Reverse direction,com63com0 SHL=0: Normal com0com63 Both master and slave should set identical SHL value Select LCD Bias 1/5, 1/6, 1/8, 1/9 bias BS1P=0, BS0P=0 : 1/5 bias BS1P=0, BS0P=1 : 1/6 bias BS1P=1, BS0P=0 : 1/8 bias BS1P=1, BS0P=1 : 1/9 bias Input low active. System reset. Input. When CS1BP = 0 and CS2P = 1 the chip select become active For 68-series MPU : Input. Active high. Used as an enable clock input of the 68-series MPU. For 68-series MPU : Input. Used as an input pin of read control signals (if R/W is high) or write control signals signals (if low). 5
I I I
SHLP
I
BS1P,BS0P
I
RST CS1BP, CS2P E R/W
I I I I
RockWorks Technology Corp.
RW1065
64x32 Dot Matrix LCD Controller / Driver (3)LCD Driver Circuit Signals
Name
I/O
Description
CLL
Input/output. I/O selection M/S = "H" & CLS = "H" Output M/S = "L" & CLS = "H" Input I/O M/S = "X" & CLS = "L" Input This is a display data latch signal to count up the line counter and common counter at each signal falling and rising edges.
SEGn
O A single level of V0, V2, V3 and VSS is selected by the combination of display RAM contents
and FR signal. Output. The output pin for LCD common (row) driving. A single level of V0, V1, V4 and VSS is selected by the combination of common counter output and FR signal. The slave LSI has the reverse common output scan sequence than the master LSI.
Output.
COMn
O
FRR
Input/output. This is the liquid crystal alternating current signal I/O terminal I/O l/O selection M/S = "H"Output M/S = "L"Input
VRAB
I
Provides the voltage between V0 and VSS through a resistive voltage divider. Input. The master or slave LSI operation select pin for the RW1065. M/S Operating Mode Master Slave FR Output Input CL See CLS Input V0~V4 On Off SEG Power Internal COMMON Output output Supply OSC See On COM0-31 SEG0-63 CLS COM32- SEG64Off Off 63 127
M/S
I
High Low
6
RockWorks Technology Corp.

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